This invention relates to a method of manufacturing a semiconductor device such as a resin-sealed LSI (large-scale integrated circuit) using a metal substrate, and in particular to an effective technique which can be applied to the manufacture of a semiconductor device (non-leaded semiconductor device) wherein external electrode terminals are made to project from a mounting surface without deliberately making the external electrode terminals project from the side of the package, such as in a SON (Small Outline Non-Leaded Package) or QFN (Quad Flat Non-Leaded Package).
In the manufacture of resin-sealed semiconductor devices, a lead frame is used. The lead frame is manufactured by forming a predetermined pattern, by stamping a metal plate with a precision press or by etching. The lead frame comprises supporting members known as tabs or diepads for fixing semiconductor elements (semiconductor chips), and plural leads whereof the ends (inner ends) are brought to the periphery of the supporting members. The tabs are supported by hanging leads extending from the frame part of the lead frame.
When a resin-sealed semiconductor device is manufactured using this lead frame, semiconductor chips are fixed to the tabs of the lead frame, the electrodes of the semiconductor chips and ends of the leads are connected by conductive wires, the inner end side including the wires and semiconductor chips is sealed by an insulating resin to fill the gaps and form a sealing package (resin sealing package), unnecessary lead frame parts are removed by cutting, and the leads projecting from the package or hanging from the tabs are cut.
As one type of resin-sealed semiconductor device manufactured by lead frames, a semiconductor device structure (non-leaded semiconductor device) is known wherein one-side molding is performed on one surface (principal surface) of the lead frame to form the package, and the leads which are external electrode terminals are exposed on the surface of the package. Examples of this type of semiconductor device are SON wherein the leads are exposed on both edges of the surface of the package, and QFN wherein the leads are exposed on four sides of the surface of a rectangular package.
In Japanese Unexamined Patent Publication No. 2000-286376, a method is described for manufacturing a non-leaded semiconductor device using a lead frame wherein leads are suspended respectively from the four corners of a rectangular island, adjacent hanging leads are joined to surround the island to form a connecting member, first connecting pieces are made to project at equal intervals towards the island from the inside of the surrounding connecting member, and second connecting pieces are made to project from the connecting member to the outside. The first connecting pieces and second connecting pieces are in a staggered footprint arrangement.
In the manufacture of semiconductor devices using this frame, a semiconductor chip is fixed to the island, a bonding pad on the front surface of the semiconductor chip is fixed to the first connecting pieces and second connecting pieces via metal filaments, the semiconductor chip and metal filaments are covered by a sealing package, the first connecting pieces and second connecting pieces are cut by dicing so as to remove the connecting member along the connecting member, the grooves are filled by resin if necessary, and the frame and sealing package are cut (full cut). This gives a non-leaded semiconductor device. The island may be formed larger or smaller than the chip.
In Japanese Unexamined Patent Publication No. 2000-216280, a technique is disclosed for manufacturing a non-leaded semiconductor device using a terminal land frame the wherein land structures projecting from one side of a frame body are arranged in a checkered pattern. The land structures are formed by forming projections by stamping the frame body, cutout step parts are broken off by applying a shear force in the stamping direction, and the land structures are separated from the frame body.
Groove parts are formed on the front surface of the projecting surface of the land structures, and projecting parts having a flat front surface are formed in the centers of depressions in the land structures. The flat surfaces of these projections form mounting surfaces for external electrode terminals of the semiconductor device. Further, a sealing resin is inlaid into the groove parts to improve the contact between the land structures forming the external electrode terminals and the resin.
In semiconductor devices using this terminal land frame, semiconductor elements are bonded to the projecting surfaces of one or more land structures by a conductive adhesive or insulating paste, the electrodes of the semiconductor elements and the land structures situated around the semiconductor elements are electrically connected by metal filaments, the principal surface of the terminal land frame is sealed by resin (one-side molding) so that the semiconductor elements and metal filaments are covered by a resin layer, resin layer parts are cut at predetermined positions to separate them, and with the terminal land frame fixed, the land structures are pressed out from the rear surface of the terminal land frame to break the land structures in the step parts. This gives a non-leaded semiconductor device.